C1E enhanced halt state — Introduced in the Pentium 4 500J-series processors, the C1E halt state replaces the old C1 halt state used on the Pentium 4 and most other x86 CPUs. The C1 halt state is invoked when the operating system's idle process issues a HLT command. (Windows does this constantly when not under a full load.) Entering halt state, which is a lower-power state, will cut a CPU's power consumption and heat production. Intel's new C1E halt state is also invoked by the HLT command, but it turns down the entire CPU's clock frequency (via multiplier control) and voltage in order to work its mojo. This more robust halt state requires significantly less power than the old C1 implementation.
Enhanced SpeedStep — SpeedStep also modulates the CPU clock speed and voltage according to load, but it is invoked via another mechanism. The operating system must be aware of SpeedStep, as must the system BIOS, and then the OS can request frequency changes via ACPI. SpeedStep is more granular than C1E halt, because it offers multiple rungs up and down the ladder between the maximum and minimum CPU multiplier and voltage levels.
То есть ещё не sleep, с точки зрения процессора спит только полмозга
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branchandroot
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Date: 2015-09-23 12:42 pm (UTC)C1E enhanced halt state — Introduced in the Pentium 4 500J-series processors, the C1E halt state replaces the old C1 halt state used on the Pentium 4 and most other x86 CPUs. The C1 halt state is invoked when the operating system's idle process issues a HLT command. (Windows does this constantly when not under a full load.) Entering halt state, which is a lower-power state, will cut a CPU's power consumption and heat production. Intel's new C1E halt state is also invoked by the HLT command, but it turns down the entire CPU's clock frequency (via multiplier control) and voltage in order to work its mojo. This more robust halt state requires significantly less power than the old C1 implementation.
Enhanced SpeedStep — SpeedStep also modulates the CPU clock speed and voltage according to load, but it is invoked via another mechanism. The operating system must be aware of SpeedStep, as must the system BIOS, and then the OS can request frequency changes via ACPI. SpeedStep is more granular than C1E halt, because it offers multiple rungs up and down the ladder between the maximum and minimum CPU multiplier and voltage levels.
То есть ещё не sleep, с точки зрения процессора спит только полмозга